Mô tả công việc
- Perform cell and chip-level schematic entry, IC layout, and verification (LVS, DRC, ERC).
- Chip floorplanning and I/O ESD routing, and support/assist in tapeout and documentation.
- Collaborate with design engineers to prepare IC layouts for tapeout on technologies such as CMOS, SOI, SiGe, and BICMOS.
- Use revision control systems for design database management.
- Create...
Yêu cầu công việc
- BS Degree in electrical engineering, computer science, or equivalent.
- Knowledge and understanding of semiconductor technology and layout verification (Design Rule Check, Layout vs. Schematic).
- Solid understanding of layout implementation flow and IC Design Methodologies using Cadence Virtuoso.
- Unwavering commitment to quality work and supporting R efforts.
- Relevant experience and a willingness to learn...
Các phúc lợi dành cho bạn
- Thưởng: Competitive salary and bonus
- Chăm sóc sức khoẻ: Social insurance, health insurance, unemployment insurance according to Labor Laws
- Đào tạo: Good chance to study and develop career path stably